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Boosting Timestamp-based Transactional Memory by Exploiting Hardware Cycle Counters
Boosting Timestamp-based Transactional Memory by Exploiting Hardware Cycle Counters Wenjia Ruan, Yujie Liu, and Michael Spear, in ACM Transactions on Architecture and Code Optimization (TACO), Volume 10, Number 4, page 40, 2013, ACM. This paper is interesting in its use of a system level global clock to define a strong ordering of operations across cores. The […]
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